Recently, along with a trend toward miniaturization of semiconductor devices, miniaturization of wiring advances. Therefore, copper (Cu) having a low bulk resistance is used as a wiring material.
As the miniaturization further advances, an increase in a wiring resistance due to a size effect becomes a problem. In other words, when a wiring width is smaller than a mean free path of an electron in wiring, scattering occurs by collision of the electron with a grain boundary or a side surface of the wiring. As a consequence, the wiring resistance is considerably increased. The mean free path of the electron depends on a wiring material. In the case of Cu, the mean free path of the electron is about 40 nm, which is large. Therefore, it is difficult in recent fine wiring having a line width of 32 nm to obtain a sufficient wiring resistance by using Cu.
Accordingly, as for a next-generation wiring material, there may be used a material having a bulk resistance that is not as low as that of Cu but whose electron has a mean free path shorter than that of Cu.
Such a material may be nickel (Ni). A bulk resistance (resistivity) of Ni is about 7 μΩ-cm which is higher than 1.7 μΩ-cm of Cu. The mean free path of the electron of Ni is about 8 nm which is considerably shorter than that of Cu.
A technique using a Ni film for fine wiring is disclosed in Japanese Patent Application Publication No. 2013-187350. Japanese Patent Application Publication No. 2013-187350 discloses a semiconductor device having wiring mainly made of Ni or Co and a line width and/or a height of the wiring of 15 nm or less. As for a film forming method for forming wiring, there are disclosed chemical vapor deposition (CVD), physical vapor deposition (PVD) and atomic layer deposition (ALD).
Other methods for forming a Ni film are disclosed in Japanese Patent Application Publication Nos. 2013-209701, 2007-507892, 2014-62281 and 2015-10175.
Japanese Patent Application Publication No. 2013-209701 discloses a method for forming a Ni film by CVD by using nickel amidinate as a film forming material gas and NH3 gas and H2 gas as reduction gases.
Japanese Patent Application Publication No. 2007-507892 discloses a metal layer forming method including exposing a substrate to a pulse of a metal-carbonyl precursor gas and exposing the substrate to a reduction gas. In this method, Ni is used as an example of the metal layer, and H2 and NH3 are used as reduction gases.
Japanese Patent Application Publication No. 2014-62281 discloses a method for forming a high-purity Ni film by performing an initial film forming process using CVD on a semiconductor wafer by using nickel amidinate as a film forming material gas and ammonia as a reduction gas, performing hydrogen treatment on the wafer by using H2 gas to remove impurities, and performing a main film forming process using CVD by using nickel amidinate as a film forming material gas and H2 gas as a reduction gas.
Japanese Patent Application Publication No. 2015-10175 discloses a method for forming a high-purity Ni film at a high film forming rate by performing an ammonia atmosphere forming process of forming an ammonia atmosphere after the initial film forming process and the hydrogen treatment disclosed in Japanese Patent Application Publication No. 2014-62281 and then performing a main film forming process using nickel amidinate and H2 gas.
Japanese Patent Application Publication No. 2013-187350 discloses that Ni is used for the fine wiring. However, a beta film formed in a test example is evaluated and actual formation of wiring is not disclosed.
In Japanese Patent Application Publication No. 2007-507892, the Ni film is used as a barrier/liner of a Cu film in the case of forming Cu wiring. In Japanese Patent Application Publication Nos. 2013-209701, 2014-62281 and 2015-10175, the Ni film is used for forming silicide of a gate electrode or a contact portion of source/drain of an MOS type semiconductor. The Ni wiring is not necessarily formed by burying a Ni film in a fine recess.